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May 1997
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HI-5700/883
8-Bit, 20 MSPS Flash A/D Converter
Description
The HI-5700/883 is a monolithic, 8-bit, CMOS Flash Analogto-Digital Converter. It is designed for high speed applications where wide bandwidth and low power consumption are essential. Its 20 MSPS speed is made possible by a parallel architecture which also eliminates the need for an external sample and hold circuit. The HI-5700/883 delivers 0.5 LSB differential nonlinearity while consuming only 725mW (typical) at 20 MSPS. Microprocessor compatible data output latches are provided which present valid data to the output bus 1.5 clock cycles after the convert command is received. An overflow bit is provided to allow the series connection of two converters to achieve 9-bit resolution.
Features
* This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. * 20 MSPS with No Missing Codes * 18MHz Full Power Input Bandwidth * No Missing Codes Over Temperature * Sample and Hold Not Required * Single +5V Supply Voltage * CMOS/TTL * Overflow Bit
Applications
* Video Digitizing * Radar Systems * Medical Imaging * Communication Systems * High Speed Data Acquisition Systems
Ordering Information
PART NUMBER HI1-5700S/883 TEMPERATURE RANGE -55oC to +125oC PACKAGE 28 Lead CerDIP
Pinout
HI-5700/883 (28 LEAD CERDIP) TOP VIEW
CLK 1 D7 2 D6 3 D5 4 D4 5 1/4R 6 VDD 7 GND 8 3/4R 9 D3 10 D2 11 D1 12 D0 13 OVF 14 28 VIN 27 VREF 26 AVDD 25 AGND 24 AGND 23 AVDD 22 1/2R 21 AVDD 20 AGND 19 AGND 18 AVDD 17 VREF + 16 CE1 15 CE2
Functional Block Diagram
1 2 VIN 28 VREF + 17 R/2 R R 3/4R 9 R R 1/2R 22 R R 1/4R 6 R R
COMP 65 COMP 256
1
1
2
D Q CL
OVERFLOW 14 (OVF) 2 D7 (MSB) 3 D6 4 D5 5 D4 10 D3 11 D2 12 D1 13 D0 (LSB) 16 CE1 15 CE2
D Q CL
D Q CL
COMPARATOR LATCHES AND ENCODER LOGIC
COMP 193
D Q CL
COMP 129
D Q CL
D Q CL
D Q CL D Q CL
R VREF - 27
COMP 2
R/2
COMP 1
D Q CL
1
CLK
1
2
VDD 7
GND
AVDD 23 21 26 18
AGND
8
24 25 19 20
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved 6-8
Spec Number File Number
512023 3286.1
HI-5700/883 Pin Descriptions
PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 NAME CLK D7 D6 D5 D4 1/4R VDD GND 3/4R D3 D2 D1 D0 OVF CE2 DESCRIPTION CE1 Clock Input Bit 7, Output (MSB) 1 Bit 6, Output X Bit 5, Output Bit 4, Output 1/4th Point of Reference Ladder Digital Power Supply Digital Ground 3/4th Point of Reference Ladder Bit 3, Output Bit 2, Output Bit 1, Output Bit 0, Output (LSB) Overflow, Output Three-State Output Enable Input, Active High. (See Truth Table) Three-State Output Enable Input, Active Low. (See Truth Table)) Reference Voltage Positive Input Analog Power Supply, +5V Analog Ground Analog Ground Analog Power Supply, +5V 1/2 Point of Reference Ladder Analog Power Supply, +5V Analog Ground Analog Ground Analog Power Supply, +5V Reference Voltage Negative Input Analog Input X = Don't Care. 0 Three-State Three-State 1 Three-State Valid 0 CE2 1
Chip Enable Truth Table
D0 - D7 Valid Valid OVF
16
CE1
17 18 19 20 21 22 23 24 25 26 27 28
VREF + AVDD AGND AGND AVDD 1/2R AVDD AGND AGND AVDD VREF VIN
Spec Number 6-9
512023
Specifications HI-5700/883
Absolute Maximum Ratings
Supply Voltage, V DD to GND . . . . . . . . . (GND - 0.5) < VDD < +7.0V Analog and Reference Input Pins. .(VSS - 0.5) < VINA < (VDD +0.5V) Digital I/O Pins . . . . . . . . . . . . . . . (GND - 0.5) < VI/O < (VDD +0.5V) Operating Temperature Range HI1-5700S/883 . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Storage Temperature Range . . . . . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . 300oC ESD Clasification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Information
Thermal Resistance JA JC HI1-5700S/883 . . . . . . . . . . . . . . . . . . . . 470C/W 28oC/W Power Dissipation at +75oC (Note 1) HI1-5700S/883 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2100mW Power Dissipation Derating Factor Above +75oC HI1-5700S/883 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21mW/oC Reliabiliy Information Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14677 Worst Case Density . . . . . . . . . . . . . . . . . . . . . . . . 3.05 x 104A/cm2
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: AVDD = VDD = +5.0V; VREF + = +4.0V; VREF - = GND = AGND = 0V; FS = Specified Clock Frequency at 50% Duty Cycle; CL = 30pF; Unless Otherwise Specified. GROUP A SUBGROUP LIMITS TEMPERATURE MIN MAX UNIT
PARAMETERS ACCURACY Integral Linearity Error (Best Fit Method)
SYMBOL
CONDITIONS
INL
FS = 15MHz, fIN = DC
1 2, 3
+25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC
-
2.0 2.65 2.25 4.1 0.9 1.0 0.9 1.0 8.0 9.5 8.0 9.5 4.5 8.0 4.5 8.0
LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB
FS = 20MHz, fIN = DC
1 2, 3
Differential Linearity Error (Guaranteed No Missing Codes)
DNL
FS = 15MHz, fIN = DC
1 2, 3
FS = 20MHz, fIN = DC
1 2, 3
Offset Error (Adjustable to Zero)
VOS
FS = 15MHz, fIN = DC
1 2, 3
FS = 20MHz, fIN = DC
1 2, 3
Full Scale Error (Adjustable to Zero)
FSE
FS = 15MHz, fIN = DC
1 2, 3
FS = 20MHz, fIN = DC
1 2, 3
ANALOG INPUT Analog Input Resistance RIN VIN = 4V 1 2, 3 Analog Input Bias Current IB VIN = 0V, 4V 1 2, 3 REFERENCE INPUT Total Reference Resistance RL 1 2, 3 +25oC +125oC, -55oC 250 235 +25oC +125oC, -55oC 4 4 1.0 1.0 M M A A
+25oC +125oC, -55oC
Spec Number 6-10
512023
Specifications HI-5700/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: AVDD = VDD = +5.0V; VREF + = +4.0V; VREF - = GND = AGND = 0V; FS = Specified Clock Frequency at 50% Duty Cycle; CL = 30pF; Unless Otherwise Specified. GROUP A SUBGROUP LIMITS TEMPERATURE MIN MAX UNIT
PARAMETERS DIGITAL INPUTS Input High Voltage
SYMBOL
CONDITIONS
VIH
1 2, 3
+25oC +125oC, -55oC
2.0 2.0 -
0.8 0.8
V V V V A A
Input Low Voltage
VIL
1 2, 3
+25oC +125oC, -55oC
Logic Input Current
IIN
VIN = 0V, +5V
1 2, 3
+25oC +125oC, -55oC
1 1
DIGITAL OUTPUTS Output Leakage IOZ CE2 = 0V, VO = 0V, 5V 1 2, 3 Output Logic Source Current IOH VO = 4.5V 1 2, 3 Output Logic Sink Current IOL VO = 0.4V 1 2, 3 POWER SUPPLY REJECTION Offset Error PSRR VOS VDD = 5V 10% 1 2, 3 Gain Error PSRR FSE VDD = 5V 10% 1 2, 3 POWER SUPPLY CURRENT Supply Current IDD FS = 20MHz 1 2, 3 NOTE: 1. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: AVDD = VDD = +5.0V; VREF + = +4.0V; VREF - = GND = AGND = 0V; FS = Specified Clock Frequency at 50% Duty Cycle; CL = 30pF; Unless Otherwise Specified. LIMITS PARAMETER Maximum Conversion Rate SYMBOL CONDITIONS No Missing Codes GROUP A SUBGROUP 9 10, 11 Data Output Enable Time tEN 9 10, 11 TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 20 20 MAX 25 30 UNIT MSPS MSPS ns ns +25oC +125oC, -55oC 180 190 mA mA +25oC +125oC, -55oC 2.75 5.5 2.75 5.5 LSB LSB LSB LSB +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC -3.2 -3.2 3.2 3.2
1.0 1.0
-
A A mA mA mA mA
+25oC +125oC, -55oC
Spec Number 6-11
512023
Specifications HI-5700/883
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: AVDD = VDD = +5.0V; VREF + = +4.0V; VREF - = GND = AGND = 0V; FS = Specified Clock Frequency at 50% Duty Cycle; CL = 30pF; Unless Otherwise Specified. LIMITS PARAMETER Data Output Disable Time SYMBOL tDIS CONDITIONS GROUP A SUBGROUP 9 10, 11 Data Output Delay tOD 9 10, 11 Data Output Hold tH 9 10, 11 TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 10 5 MAX 20 25 25 30 UNIT ns ns ns ns ns ns
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (NOTE 1) Device Characterized at: AVDD = VDD = +5.0V; VREF + = +4.0V; VREF - = GND = AGND = 0V; FS = Specified Clock Frequency at 50% Duty Cycle; CL = 30pF; Unless Otherwise Specified. LIMITS PARAMETER Minimum Conversion Rate NOTE: 1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot to lot and within lot variation. SYMBOL CONDITIONS No Missing Codes TEMPERATURE +25oC, +125oC, -55oC MIN MAX 0.125 UNIT MSPS
TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS Interim Electrical Parameters (Pre Burn-In) Final Electrical Test Parameters Group A Test Requirements Groups C & D Endpoints NOTE: 1. PDA applies to Subgroup 1 only. No other subgroups are included in PDA. SUBGROUPS (SEE TABLES 1 AND 2) 1 1 (Note 1), 2, 3, 9, 10, 11 1, 2, 3, 9, 10, 11 1
Spec Number 6-12
512023
HI-5700/883 Die Characteristics
DIE DIMENSIONS: 154.3 x 173.2 x 19 1mils METALLIZATION: Type: Si - Al Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 8kA 1kA DIE ATTACH: Material: Gold Silicon Eutectic Alloy Temperature: Ceramic DIP - 460oC (Max) WORST CASE CURRENT DENSITY: 3.05 x 104 A/cm 2
Metallization Mask Layout
HI-5700/883
VREF AVDD CLK D5 D6 D7 VIN
4
D4
3
2
1
28
27
26
5 25
AGND
1/4R VDD
6 7 24
AGND
23
VDD
AVDD
7 22
1/2R
GND
8 21
AVDD
GND
8 20
AGND
3/4R
9
D3
10
19
AGND
11
D2
12
D1
13
D0
14
OVF
15
CE2
16
CE1
17
VREF +
18
AVDD
Spec Number 6-13
512023
Specifications HI-5700/883 Timing Waveforms
ENCODER DATA IS LATCHED INTO THE OUTPUT REGISTERS SAMPLE N+2
COMPARATOR DATA IS LATCHED CLOCK INPUT SAMPLE N-2 SAMPLE N-1 SAMPLE N SAMPLE N+1
AUTO BALANCE tAB
AUTO BALANCE
AUTO BALANCE
AUTO BALANCE
ANALOG INPUT
tAP tH tAJ tOD
DATA OUTPUT
DATA N-4
DATA N-3
DATA N-2
DATA N-1
DATA N
FIGURE 1. INPUT-TO-OUTPUT TIMING
CE1
CE2 tEN HIGH IMPEDANCE tDIS tEN
tDIS D0 - D7 DATA
DATA
HIGH IMPEDANCE
DATA
OVF
DATA
HIGH IMPEDANCE
DATA
FIGURE 2. OUTPUT ENABLE TIMING
Spec Number 6-14
512023
HI-5700/883 Burn-In Circuit
HI-5700/883 CERAMIC DIP
+5.5V 1:10 DUTY CYCLE 100kHz; 0 < V< 5 VOLTS GND 1 2 3 4 5 6 7 8 9 CLK D7 D6 D5 D4 1/4R DVDD DGND 3/4R VIN 28 VREF- 27 AVDD 26 AGND 25 AGND 24 AVDD 23 1/2R 22 AVDD 21 AGND 20 AGND 19 AVDD 18 VREF+ 17 CE1 16 CE2 15 GND 0.01F 1F TRIANGLE-WAVEFORM; fIN = 12.5kHz 0.01F 1F
10 D3 11 D2 12 D1 13 D0 14 OVF
GND
Spec Number 6-15
512023

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